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5-V Low Drop Fixed Voltage Regulator
TLE 4299
Features * * * * * * * * * * Output voltage 5 V 2% 150 mA Output current Extreme low current consumption typical 65 A in ON state Inhibit function: Below 1 A current consumption in off mode Early warning Reset output low down to VQ = 1 V Adjustable reset threshold Overtemperature protection Reverse polarity proof Wide temperature range
P-DSO-8-3, -6, -7, -8, -9
Functional Description
P-DSO-14-3, -8, -9, -11, 14
The TLE 4299 is a monolithic voltage regulator with fixed 5-V output, supplying loads up to 150 mA. It is especially designed for applications that may not be powered down while the motor is off. It only needs a quiescent current of typical 65 A. In addition the TLE 4299 GM includes an inhibit function. When the inhibit signal is removed, the device is switched off and the quiescent current is less than 1 A. To achieve proper operation of the -controller, the device supplies a reset signal. The reset delay time is selected application-specific by an external delay capacitor. The reset threshold is adjustable. An early warning signal supervises the voltage at pin SI. The TLE 4299 is pin-compatible to the TLE 4269 and functional similar with the additional inhibit function. The TLE 4299 is designed to supply microcontroller systems even under automotive environment conditions. Therefore it is protected against overload, short circuit and overtemperature.
Type TLE 4299 G TLE 4299 GM
Data Sheet
Ordering Code Q67006-A9417 Q67006-A9441
1
Package P-DSO-8-3 P-DSO-14-8
Rev. 1.1, 2004-01-01
TLE 4299
Circuit Description The TLE 4299 is a PNP based very low drop linear voltage regular. It regulates the output voltage to VQ = 5 V for an input voltage range of 5.5 V VI 45 V. The control circuit protects the device against potential caused by damages overcurrent and overtemperature. The internal control circuit achieves a 5 V output voltage with a tolerance of 2%. The device includes a power on reset and an under voltage reset function with adjustable reset delay time and adjustable reset switching threshold as well as a sense control/early warning function. The device includes an inhibit function to disable it when the ECU is not used for example while the motor is off. The reset logic compares the output voltage VQ to an internal threshold. If the output voltage drops below this level, the external reset delay capacitor CD is discharged. When VD is lower than VLD, the reset output RO is switched Low. If the output voltage drop is very short, the VLD level is not reached and no reset-signal is asserted. This feature avoids resets at short negative spikes at the output voltage e.g. caused by load changes. As soon as the output voltage is more positive than the reset threshold, the delay capacitor is charged with constant current. When the voltage reaches VUD the reset output RO is set High again. The reset threshold is either the internal defined VRT voltage (typical 4.6 V) or can be lowered by a voltage level at the RADJ input down to 3.5 V. The reset delay time and the reset reaction time are defined by the external capacitor CD. The reset function is active down to VI = 1 V. In addition to the normal reset function, the device gives an early warning. When the SI voltage drops below VSI,low, the devices asserts the SI output Low to indicate the logic and the -processor that this voltage has dropped. The sense function uses a hysteresis: When the SI-voltage reaches the VSI,high level, SO is set high again. This feature can be used as early warning function to notice the -controller about a battery voltage drop and a possible reset in a short time. Of cause also any other voltage can be observed by this feature. The user defines the threshold by the resistor-values RSI1 and RSI2. For the exact timing and calculation of the reset and sense timing and thresholds, please refer to the application section.
Data Sheet
2
Rev. 1.1, 2004-01-01
TLE 4299
I
BandGapReference Current and Saturation Control
Q
RSO
RRO
SO SI Reference Reset Control RADJ RO
D
GND
AEB03103
Figure 1
Block Diagram TLE 4299 G
Data Sheet
3
Rev. 1.1, 2004-01-01
TLE 4299
TLE 4299
I
BandGapReference Current and Saturation Control
Q
RSO
INH
Inhibit Control
RRO
SO
SI Reference Reset Control RADJ RO
D
GND
AEB03104
Figure 2
Block Diagram TLE 4299 GM
Data Sheet
4
Rev. 1.1, 2004-01-01
TLE 4299
P-DSO-8-3
I
SI RADJ D
1 2 3 4
8 7 6 5
Q SO RO GND
AEP02832
Figure 3 Table 1 Pin No. 1 2 3 4 5 6 7 I SI
Pin Configuration (top view) Pin Definitions and Functions (TLE 4299 G) Symbol Function Input; block directly to GND on the IC with a ceramic capacitor. Sense Input; if not needed connect to Q. Reset Threshold; if not needed connect to GND. Reset Delay; to select delay time, connect to GND via external capacitor. Ground Reset Output; the open-collector output is internally linked to Q via a 20 k pull-up resistor. Keep open, if the pin is not needed. Sense Output; the open-collector output is internally linked to the output via a 20 k pull-up resistor. Keep open, if the pin is not needed. 5-V Output; connect to GND with a 22 F capacitor, ESR < 5 .
RADJ D GND RO SO
8
Q
Data Sheet
5
Rev. 1.1, 2004-01-01
TLE 4299
P-DSO-14-8
RADJ D GND GND GND INH RO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SI
I
GND GND GND Q SO
AEP02831
Figure 4 Table 2 Pin No. 1 2 3, 4, 5 6 7 8 9 13 14
Pin Configuration (top view) Pin Definitions and Functions (TLE 4299 GM) Symbol RADJ D GND INH RO SO Q I SI Function Reset Threshold; if not needed connect to GND. Reset Delay; connect to GND via external delay capacitor for setting delay time. Ground Inhibit; If not needed connect to input pin I; a high signal switches the regulator ON. Reset Output; open-collector output, internally connected to Q via a pull-up resistor of 20 k. Keep open, if the pin is not needed. Sense Output; open-collector output, internally connected to Q via a 20 k pull-up resistor. Keep open, if the pin is not needed. 5-V Output; connect to GND with a 22 F capacitor, ESR < 5 . Ground Input; block to GND directly at the IC by a ceramic capacitor. Sense Input; if not needed connect to Q.
10, 11, 12 GND
Data Sheet
6
Rev. 1.1, 2004-01-01
TLE 4299
Table 3
Absolute Maximum Ratings
Tj = -40 to 150 C
Parameter Input I Input voltage Inhibit Input INH Input voltage Sense Input SI Input voltage Input current Reset Threshold RADJ Voltage Current Reset Delay D Voltage Reset Output RO Voltage Sense Output SO Voltage 5-V Output Q Output voltage Output current Temperature Junction temperature Storage temperature Operating Range Input voltage Junction temperature Symbol Limit Values Min. Max. 45 45 45 1 7 10 7 7 7 7 - 150 150 45 150 V V V mA V mA V V V V mA - - - - - - - - - - - - - - - Unit Notes
VI VINH VSI ISI VRE IRE VD VR VSO VQ IQ Tj TStg VI Tj
-40 -40 -0.3 1 -0.3 -10 -0.3 -0.3 -0.3 -0.3 -5 - -50 4.5 -40
C C
V
C
Data Sheet
7
Rev. 1.1, 2004-01-01
TLE 4299
Table 3
Absolute Maximum Ratings (cont'd)
Tj = -40 to 150 C
Parameter Thermal Data Junction-ambient Junction-pin
1) Measured to pin 4.
Symbol
Limit Values Min. Max. 200 70 60 30
Unit
Notes
Rthja Rthjp
- - - -
K/W K/W K/W K/W
P-DSO-8-3 P-DSO-14-8 P-DSO-8-3 P-DSO-14-81)
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. In the operating range, the functions given in the circuit description are fulfilled.
Data Sheet
8
Rev. 1.1, 2004-01-01
TLE 4299
Table 4
Characteristics
VI = 13.5 V; Tj = -40 C < Tj < 150 C
Parameter Output voltage Output voltage Current limit Current consumption; Iq = II - IQ Current consumption; Symbol Limit Values Min. Typ. Max. 4.90 5.00 5.10 4.85 5.00 5.15 250 - - - - - - - - - 400 65 65 170 0.7 - 500 105 100 500 2 1 Unit Measuring Condition V V mA 1 mA IQ 100 mA; 6 V VI 16 V
VQ VQ IQ Iq Iq Iq Iq Iq Vdr
VQ VQ
IQ 150 mA; 6 V VI 16 V
- Inhibit ON; IQ 1 mA, Tj < 85 C Inhibit ON; IQ 1 mA, Tj = 25 C Inhibit ON; IQ = 10 mA Inhibit ON; IQ = 50 mA
A A A
mA
Iq = II - IQ
Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Drop voltage Load regulation Line regulation Power Supply Ripple Rejection
A
V mV mV dB
VINH = 0 V; Tj = 25 C IQ = 100 mA1) IQ = 1 mA to 100 mA VI = 6 V to 28 V; IQ = 1 mA fr = 100 Hz; Vr = 1 Vpp; IQ = 100 mA
TLE 4299 GM; VQ off TLE 4299 GM; VQ on TLE 4299 GM; VINH = 5 V TLE 4299 GM; VINH = 0 V
0.22 0.5 5 10 66 30 25 -
PSRR
Inhibit (TLE 4299 GM only) Inhibit OFF voltage range VINH OFF - Inhibit ON voltage range High input current Low input current - - 3 0.5 0.8 - 5 2 V V
VINH ON IINH ON IINH OFF
3.5 - -
A A
Data Sheet
9
Rev. 1.1, 2004-01-01
TLE 4299
Table 4
Characteristics (cont'd)
VI = 13.5 V; Tj = -40 C < Tj < 150 C
Parameter Reset Generator Switching threshold Reset pull-up Reset low voltage External reset pull-up Switching threshold Reset delay low voltage Charge current Reset delay time Reset reaction time Reset adjust switching threshold Input Voltage Sense Sense threshold high Sense threshold low Sense input switching hysteresis Symbol Limit Values Min. Typ. Max. Unit Measuring Condition
Vrt RRO VR VR ext VST VD Ich td trr
4.50 4.60 4.80 10 - 5.6 1.5 - 4.0 17 0.5 20 40 0.17 0.40 - -
V k V k V V V
- -
VQ < 4.5 V; internal RRO; IR = 1 mA
Pull-up resistor to Q - -
Delay switching threshold VDT
1.85 2.2 - 8.0 28 1.2 0.1 12.0 35 3.0
0.35 0.50 0.60
VQ < VRT VD = 1 V CD = 100 nF CD = 100 nF VQ > 3.5 V
A
ms
s
VRADJ TH 1.26 1.36 1.44 V
VSI high VSI low
1.34 1.45 1.54 1.26 1.36 1.44 90 0.1 - 20 0.1 2.4 1.7 130 0.4 - 40 1 2.9 2.1
V V mV V k k
- -
VSI HYST 50
- 5.6 10
-1
VSI HYST = VSI high - VSI low VSI < 1.20 V; Vi > 4.2 V; ISO = 0
- - - - -
Sense output low voltage VSO low External SO pull-up resistor Sense pull-up Sense input current Sense low reaction time
RSO ext RSO ISI
A s s
Sense high reaction time tpd SO LH
-
tpd SO HL -
1) Drop voltage = VI - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input.)
Data Sheet
10
Rev. 1.1, 2004-01-01
TLE 4299
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and the given supply voltage.
II VI I
TLE 4299 Q1
IQ1 VQ1
IINH VINH
(TLE 4299 GM only)
ID ID
INH D RO
CD
100 nF
VRO
IRADJ VRADJ VSI
RADJ
ISI
SI GND SO
VSO
IGND
AES02835
Figure 5
Measurement Circuit
Data Sheet
11
Rev. 1.1, 2004-01-01
TLE 4299
Application Information
TLE 4299
VBAT CI1
CI2
I
C Q 22 F Q2
CQ1
P
BandGapReference
Current and Saturation Control
RSO
RRO RSI1
SI SO
RSI2
Reference Reset Control
RO
RADJ1
RADJ GND D
CD
RADJ2
AES03105
Figure 6
Application Diagram TLE 4299 G
Data Sheet
12
Rev. 1.1, 2004-01-01
TLE 4299
TLE 4299
VBAT CI1
CI2
I
C Q 22 F Q2
CQ1
P
BandGapReference
Current and Saturation Control
RSO
From KI. 15
INH
Inhibit Logic
RRO
SO
RSI1
SI
RSI2
Reference Reset Control
RO
RADJ1
RADJ GND D
CD
RADJ2
AES03106
Figure 7
Application Diagram with Inhibit Function
The TLE 4299 supplies a regulated 5 V output voltage with an accuracy of 2% from an input voltage between 5.5 V and 45 V in the temperature range of Tj = -40 to 150 C. The device is capable to supply 150 mA. For protection at high input voltage above 25 V, the output current is reduced (SOA protection). An input capacitor is necessary for compensating line influences and to limit steep input edges. A resistor of approx. 1 in series with CI, can damp the LC of the input inductivity and the input capacitor. The voltage regulator requires for stability an output capacitor CQ of at least 22 F with an ESR below 5 .
Data Sheet
13
Rev. 1.1, 2004-01-01
TLE 4299
Reset The power on reset feature is necessary for a defined start of the microprocessor when switching on the application. For the reset delay time after the output voltage of the regulator is above the reset threshold, the reset signal is set High again. The reset delay time is defined by the reset delay capacitor CD at pin D. The under-voltage reset circuitry supervises the output voltage. In case VQ decreases below the reset threshold the reset output is set LOW after the reset reaction time. The reset LOW signal is generated down to an output voltage VQ to 1 V. Both the reset reaction time and the reset delay time is defined by the capacitor value. The power on reset delay time is defined by the charging time of an external delay capacitor CD.
CD = (td x ID) / V
Definitions: * * * * *
(1)
CD = reset delay capacitor td = reset delay time V = VUD, typical 1.8 V for power up reset V = VUD - VLD, typical 1.35 V for undervoltage reset ID = charge current, typical 6.5 A For a delay capacitor CD = 100 nF the typical power on reset delay time is 28 ms. The reset reaction time tRR is the time it takes the voltage regulator to set reset output
LOW after the output voltage has dropped below the reset threshold. It is typically 1 s for delay capacitor of 100 nF. For other values for CD the reaction time can be estimated using the following equation: (2)
tRR = 10 ns / nF x CD
Data Sheet
14
Rev. 1.1, 2004-01-01
TLE 4299
VI
VQ V RT
t < t RR
VD V UD V LD V RO VRO, SAT td t RR
dV I D = dt C D
t
t
t Power-on-Reset Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output
AED03107
Figure 8
Reset Timing Diagram
The reset output is an open collector output with a pull-up resistor of typical 20 k to Q. An external pull-up can be added with a resistor value of at least 5.6 k. In addition the reset switching threshold can be adjusted by an external voltage divider. The feature is useful for microprocessors which guarantee safe operation down to voltages below the internally set reset threshold of 4.65 V typical. If the internal used reset threshold of typical 4.65 V is used, the pin RADJ has to be connected to GND. If a lower reset threshold is required by the system, a voltage divider defines the reset threshold VRth between 3.5 V and 4.60 V:
VRth = VRADJ TH x (RADJ1 + RADJ2) / RADJ2 VRADJ TH is typical 1.36 V.
Early Warning
(3)
The early warning function compares a voltage defined by the user to an internal reference voltage. Therefore the supervised voltage has to be scaled down by an
Data Sheet
15
Rev. 1.1, 2004-01-01
TLE 4299
external voltage divider in order to compare it to the internal sense threshold of typical 1.35 V. The sense output pin is set low, when the voltage at SI falls below this threshold. A typical example where the circuit can be used is to supervise the input voltage VI to give the microcontroller a prewarning of low battery condition. Calculation to the voltage divider can be easily done since the sense input current can be neglected.
Sense Input Voltage VSI, High
VSI, Low
t Sense Output High t PD SO LH t PD SO HL
Low t
AED02559
Figure 9
Sense Timing Diagram (4) (5)
VthHL = (RSI1 + RSI2)/RSI2 x VSI low VthLH = (RSI1 + RSI2)/RSI2 x VSI high
The sense in comparator uses a hysteresis of typical 100 mV. This hysteresis of the supervised threshold is multiplied by the resistor dividers amplification (RSI1 + RSI2)/RSI1. The sense in comparator can also be used for receiving data with a threshold of typical 1.35 V and a hysteresis of 100 mV. Of course also the data signal can be scaled down with a resistive divider as shown above. With a typical delay time of 2.4 s for positive transitions and 1.7 s for negative transitions receiving data of up to 100 kBaud are possible.
Data Sheet
16
Rev. 1.1, 2004-01-01
TLE 4299
The sense output is an open collector output with a pull-up resistor of typical 20 k to Q. An external pull-up can be added with a resistor value of at least 5.6 k. Typical Performance Characteristics Output Voltage VQ versus Temperature Tj
5.2 VQ V 5.1 V = 13.5 V 5.0
8
AED01671
Output Voltage VQ versus Input Voltage VI
12 VQ V 10
AED01808
4.9
6
RL = 50
4.8
4
4.7
2
4.6 -40
0
40
80
120 C 160 Tj
0
0
2
4
6
8 V
V 10
Data Sheet
17
Rev. 1.1, 2004-01-01
TLE 4299
Charge Current Ich versus Temperature Tj
12
AED03108
Drop Voltage Vdr versus Output Current IQ
400 mV 125 C 300
AED02929
ID A
10
VDR
8
VI = 13.5 V VD = 1 V
250 200 150 100
25 C
6
4
2
50
0 -40
0
40
80
120 C 160
0
0
50
100
150 mA 200
Tj
IQ
Switching Voltage Vdt and Vst versus Temperature Tj
3.2 VD V 2.8 V = 13.5 V 2.4 2.0 1.6 1.2 VUD
AED01804
Reset Adjust Switching Threshold VRADJTH versus Temperature Tj
1.5 V
AED03109
VRADJTH
1.4
1.3
1.2
1.1
0.8 VLD 0.4 0 -40
1.0
0
40
80
120 C 160 Tj
0.9 -40
0
40
80
120 C 160
Tj
Data Sheet
18
Rev. 1.1, 2004-01-01
TLE 4299
Sense Threshold Vsi versus Temperature Tj
1.6
AED02933
Output Current Limit IQ versus Input Voltage VI
350
AED03110
VSi
V 1.5 Sense Output High
Q mA
300 250
1.4 Sense Output Low
200 Tj = 25 C
1.3
150 Tj = 125 C
1.2
100
1.1
50 0
1.0 -40
0
40
80
120 C 160
0
10
20
30
40 V 50 V
Tj
Current Consumption Iq versus Output Current IQ
1.0 mA 0.8
AED02931
Current Consumption Iq versus Output Current IQ
5 mA 4
AED02932
Iq
Iq
0.6
3
0.4
2
0.2
1
0
0
10
20
30
40
mA 60
0
0
50
100
150 mA 200
IQ
IQ
Data Sheet
19
Rev. 1.1, 2004-01-01
TLE 4299
Package Outlines
0.33 0.08 x 45
1.75 MAX. 0.1 MIN. (1.5)
4 -0.21)
1.27 0.41 +0.1 -0.05 8 5
0.1
C
6 0.2
0.64 0.25
0.2 M A C x8
Index Marking 1
4
5 -0.21)
1)
A
Index Marking (Chamfer) Does not include plastic or metal protrusion of 0.15 max. per side
8 MAX.
0.2 +0.05 -0
.01
GPS09032
Figure 10
P-DSO-8-3 (Plastic Dual Small Outline)
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet 20 Dimensions in mm Rev. 1.1, 2004-01-01
TLE 4299
0.33 0.08 x 45
1.75 MAX.
4 -0.2 1)
0.1 MIN. (1.5)
1.27 0.41 +0.1 -0.06 14
0.2 M
8
0.1 A C 14x
C
6 0.2
0.64 0.25
1 7 8.75 -0.2 1)
A
Index Marking
1)
Does not include plastic or metal protrusion of 0.15 max. per side
8 MAX.
0.2 +0.05
-0.01
GPS09033
Figure 11
P-DSO-14-8 (Plastic Dual Small Outline)
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet 21 Dimensions in mm Rev. 1.1, 2004-01-01
Edition 2004-01-01 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 Munchen, Germany
(c) Infineon Technologies AG 2004.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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